[Dwarf-Discuss] DWARF for DSP like processors with multiple memories
kees.bakker at altium.nl
Wed Nov 26 00:42:45 PST 2008
On Monday 24 November 2008, Anthony Berent wrote:
> I am looking for some advice on the correct use of DWARF for describing code
> running on an ARM Data Engine. ARM Data Engines are DSPs with multiple
> memories (not just data and instruction, but multiple data memories), each
> independently addressed. The C source code used to program the Data Engines
> uses pragmas to assign variables to particular memories, and to qualify
> pointers with the targeted memory. The addresses used within the processors
> never include an explicit memory identifier, instead there are different
> instructions to access each memory.
At Altium (formerly Tasking) we have several compilers where this is an issue.
> At the moment our DWARF description uses segment attributes (DW_AT_SEGMENT)
> to describe the allocation of variables to memories, but we are not sure if
> this is a correct use of DWARF. In particular:
> 1. Is this a reasonable use of DW_AT_segment, which was, I believe,
> originally created for processors with segmented memory of the sort
> implemented in small-mode x86?
> 2. Is anybody currently using DW_AT_segment in a similar way, or
> solving a similar problem in a different way? If so, for which
We're not using AT_segment at all, mainly because we could get away by using
> 3. How should we describe which memory is targeted by pointers? Is
> using the DW_AT_address_class the right way to do this?
We use AT_address_class, but not just for pointers. If a variable is located
in a certain memory space, then the type for that variable can get this
attribute too. Same goes for functions.
> 4. Is there any way of describing in DWARF which memories contain the
> stack? I can't see any way of including segment information in DWARF 3 call
> frames, and, if I am reading it correctly the DWARF 4 draft I have seen this
> only supports segment information in the PC value in call frames.
> * I say memories (plural) because some ARM Data Engines only
> allow certain registers to be saved in particular memories, so we sometimes
> need multiple stacks.
We have some targets that do have multiple stacks. If I remember correctly, for
each calling convention used in the program we create a CIE with FDEs. But I
don't see anything that specifies memory space in there. It's been too long
since I looked at it in more detail, so sorry, no answer there.
> Many thanks for any advice anybody can give.
> - Anthony Berent
> ARM Ltd
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