[Dwarf-Discuss] Multiple address space architectures and DW_AT_frame_base

Relph, Richard Richard.Relph at amd.com
Thu May 19 16:12:03 PDT 2011


Imagine an architecture with multiple disjoint memory spaces. Imagine that the frame base could be in any of them. Other than expanding the size of an address, how can I do this?
I've thought about DW_AT_address_class, but I can't figure out how to associate it with a DW_TAG_subprogram's DW_AT_frame_base location. The spec says DW_AT_address_class for DW_TAG_subprogram describes how to access the subprogram itself.
DW_AT_address_class isn't technically allowed in a DW_TAG_compile_unit (it will be the same address space across the entire compilation unit).
A location description doesn't have a mechanism to specify an address class. It would be be implied by the type information associated with the object being described (though if the object shifts address spaces, that seems impossible to describe as well.)
Unfortunately, there is no type information for DW_AT_frame_base.
Any ideas?

Richard Relph
MTS | Stream Compute SW | AMD
o. 408.749.6659

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