[Dwarf-Discuss] FDEs involving predicated instructions

Humphreys, Jonathan j-humphreys at ti.com
Fri May 10 10:16:37 PDT 2013

Thanks for the reply.  I was afraid that was going to be the suggestion!  I was hoping that there was more direct support for predication.

Although, I'm not sure what that direct support would look like.  Maybe there's no way around using the DWARF expression capabilities (although it's more like a program).  I definitely share your concern of how well supported/tested that capability is in today's debuggers.  Another concern is the debug object size.  I would imagine that the below code snippet would be used quite often, depending upon how aggressively code is predicated (we have deep pipeline architectures where predication is heavily utilized).  I wonder if it makes sense to have a facility that abstracts out the code so that it can be referenced and reused at many locations.


-----Original Message-----
From: Christopher Mead [mailto:Christopher.Mead at arm.com] 
Sent: Wednesday, May 08, 2013 8:59 AM
To: Michael Eager; Humphreys, Jonathan
Cc: dwarf-discuss at lists.dwarfstd.org
Subject: RE: [Dwarf-Discuss] FDEs involving predicated instructions


In the FDE one could, in theory, emit a DW_CFA_def_cfa_expression for the ADDNE and BEQ along the lines of (modulo bugs):
  ULEB128 <size of following DW_OP_* "instructions">

  ;Extract the mode bits from the CPSR (or wherever your processor stores condition flags)
  DW_OP_bregx CPSR, 0   ; If the CPSR isn't numbered (e.g. in ARM DWARF ABI) then you'll
                        ; need to recompute the CPSR or equivalent bits here
  ; Pull out the bit that controls the NE predication and mask them off
  DW_OP_shr #30         ; Or wherever the relevant bits are
  DW_OP_and #0x1
  DW_OP_bra LABEL       ; Conditionally branch on NE predicate
  .                     ; Value of CFA is SP +- some offset
  DW_OP_skip END
  .                     ; Value of CFA is SP +- some other offset
  ; When we get here the right value for the CFA is on top of the operand stack.

I may have put some illegal expression operators (6.4.2 in DWARF v4).

Although whether any consumers actually support DW_CFA_def_cfa_expression (or even DW_CFA_val_expression or DW_CFA_expression for that matter?) and have actually been tested for this is a different matter.  This approach was broadly enough describe unwinding through ARM (hardware, not C++) exception vector handlers where the return address is stored in different physical register to the usual LR as per the procedure calling standard.

Kind regards,

Chris Mead.
Chris Mead - Senior Software Engineer - ARM
Phone: +44 1223 406 317
Email: christopher.mead at arm.com

> -----Original Message-----
> From: dwarf-discuss-bounces at lists.dwarfstd.org [mailto:dwarf-discuss- 
> bounces at lists.dwarfstd.org] On Behalf Of Michael Eager
> Sent: 08 May 2013 09:19
> To: Humphreys, Jonathan
> Cc: dwarf-discuss at lists.dwarfstd.org
> Subject: Re: [Dwarf-Discuss] FDEs involving predicated instructions
> Anyone have any suggestions for Jonathan?
> On 04/22/2013 11:47 AM, Humphreys, Jonathan wrote:
> > Sure, I'll use ARM as it's a pretty well-known processor.
> >
> > Suppose I have an epilog that consists of stack deallocation and a
> combined SOE register save and return.  And suppose that the 
> predecessor block will conditionally fall through to the epilog.  So 
> we
> have:
> >
> > continue:
> >          ....
> >          BEQ continue
> > Epilog:
> >          ...
> >          ADD       SP, SP, #52
> >          POP       {V1, V2, V3, V4, V5, V6, V7, V8, PC}
> >
> > Let's then say that the optimizer sees a stall in the predecessor
> block where it can place the stack deallocation instruction.  But to 
> move it into the predecessor block, it must predicate the instruction 
> so that it only executes on the fall through path.  We then have:
> >
> > continue:
> > ....
> >          ADDNE     SP, SP, #52
> >          BEQ continue
> > Epilog:
> >          ...
> >          POP       {V1, V2, V3, V4, V5, V6, V7, V8, PC}
> >
> > In the unoptimized case, the compiler would put a DWARF directive
> after the ADD instruction to indicate the CFA has changed by 52.  I 
> cannot do the same in the optimized case without also predicating the 
> DWARF directive somehow.
> >
> > So my question is how do we support DWARF directives on predicated
> instructions where the effect of the instruction may not happen, 
> depending upon some predicate or status register.
> >
> > I hope this helps.
> > Thanks
> > Jon
> >
> > -----Original Message-----
> > From: Michael Eager [mailto:eager at eagercon.com]
> > Sent: Friday, April 19, 2013 6:05 PM
> > To: Humphreys, Jonathan
> > Cc: dwarf-discuss at lists.dwarfstd.org
> > Subject: Re: [Dwarf-Discuss] FDEs involving predicated instructions
> >
> > On 04/19/2013 03:50 PM, Humphreys, Jonathan wrote:
> >> I’m wondering the best way to handle predicated prolog/epilog 
> >> instructions in the Call Frame Information.
> >>
> >> Suppose you have an epilog instruction that restores an SOE 
> >> register and it is predicated and scheduled in a predecessor block.  
> >> How do
> you
> >> handle emitting an FDE rule that describes that a register is
> restored when a predicate or status register is a certain value?
> >>
> >> I can give an example if this isn’t clear.
> >
> > Yes, an example would be helpful.
> >
> >
> --
> Michael Eager  eager at eagercon.com
> 1960 Park Blvd., Palo Alto, CA 94306  650-325-8077
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