[Dwarf-Discuss] DWARF piece questions

[David Anderson]

On 01/26/2017 11:17 AM, Andreas Arnez wrote:
> (Now I wonder how a MIPS big-endian ABI *really* defines DWARF piece
> placement in registers.  Do you know?)

These SYSV ABI documents are all...old.
I don't find more recent hardware/ABI documented this way.
Has to be in other sorts of documents.

I happen to have the MIPS SYSV ABI and
Motorola 88000 SYSV ABI documents
from 1991 on hand.  Both are big-endian
explicitly in their ABI conformant versions.  (The MIPS
processor can do little-endian too, but that is not an ABI
that is documented and the book says an ABI-conformant
system must support big endian byte ordering).
In 1991 there was no 64bit of either.

Bit offsets for these are explicitly:
  0 at the least significant end
  31 is the most significant end.
On the page bit 31 is at the left end.

Things look the same in registers and memory.
The old ABI never describes the location of floating point fields,
and the other documents that actually described bit offsets for fp
values were...confusing to say the least. For one thing the
ordering of the 32-bit pieces of a 64bit double is not what you
would guess (32bit pieces of the double are swapped).

For x86 the ABI (little-endian) is on line at
http://www.sco.com/developers/devspecs/abi386-4.pdf
which is amazing as sco is long gone.
This document labels itself a draft from
March 19,1997.
Bit fields are show as they appear in an integer register:
meaning as big-endian with most significant bit bit31,
least significant bit is bit zero (just as for MIPS and 88000).
Byte numbers are with least significant byte at byte 0
and most significant byte at byte 3 (as you  would expect).
On the printed page the most significant bit is at the left end.
Floating point formats (as bits or bytes) are not documented here in any
way.


David Anderson
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