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<p class="MsoNormal">If you can’t find it in an ABI document… You might want to look at the GDB sources, which usually contains the code to handle various targets, probably in a file named “gdb/mips*tdep.h”.<o:p></o:p></p>
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<p class="MsoNormal">Cheers, John D.<o:p></o:p></p>
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<p class="MsoNormal"><b>From:</b> Dwarf-discuss <dwarf-discuss-bounces+jdelsignore=perforce.com@lists.dwarfstd.org>
<b>On Behalf Of </b>Seva Alekseyev via Dwarf-discuss<br>
<b>Sent:</b> Wednesday, August 16, 2023 11:23 AM<br>
<b>To:</b> dwarf-discuss@lists.dwarfstd.org<br>
<b>Subject:</b> [Dwarf-discuss] DWARF register numbers on MIPS<o:p></o:p></p>
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<span style="font-size:11.5pt;font-family:"Segoe UI",sans-serif;color:#232629">What is the canonical mapping between DWARF register numbers and MIPS32 CPU registers, please? The first 32 ones are the general purpose registers, but what about beyond that (e.
g. lo/hi)?<o:p></o:p></span></p>
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<span style="font-size:11.5pt;color:#232629">A link to an authoritative document would be most welcome. DWARF proper doesn't document this kind of thing, it's usually a part of the ABI, but the ABI handbook doesn't seem to mention DWARF.<o:p></o:p></span></p>
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