[Dwarf-Discuss] Representing the location of smaller values in vector registers

Adrian Prantl aprantl@apple.com
Fri Mar 4 22:05:32 GMT 2016


> On Mar 4, 2016, at 2:00 PM, Robinson, Paul <Paul_Robinson at playstation.sony.com> wrote:
> 
> I tried a CU with an int variable instead of float, and enough other
> stuff to keep it from being optimized away completely.
> gcc produced DW_OP_reg3, while Clang produced "DW_OP_reg3; DW_OP_piece 4"
> for the same variable.
> 
> DW_OP_piece is really meant for assembling partial values in different
> places, not subdividing a register.

I agree! I?ve been wanting to clean this up for a while now, I hope I?ll get to this soon.

thanks everyone for your feedback!
adrian


> --paulr
> 
>> -----Original Message-----
>> From: Dwarf-Discuss [mailto:dwarf-discuss-bounces at lists.dwarfstd.org] On
>> Behalf Of Adrian Prantl
>> Sent: Friday, March 04, 2016 1:13 PM
>> To: dwarf-discuss at lists.dwarfstd.org
>> Subject: [Dwarf-Discuss] Representing the location of smaller values in
>> vector registers
>> 
>> I have a best-practice kind of question:
>> 
>> The x86_64 System V ABI passes floating point values in the xmm0, xmm1,
>> ... 128-bit SSE vector registers. I?m wondering what the correct DWARF v4
>> (lacking the DWARF 5 type conversions) expression for a 32-bit float in
>> xmm0 is.
>> 
>> Given the following program:
>> 
>> float return_float() __attribute__((noinline)) { return 3.14f; }
>> 
>> int main(int argc, char** argv) {
>>  float f = return_float();
>>  return (int)f;
>> }
>> 
>> Clang (-O1) currently produces the following DWARF for the variable f:
>> 
>> DW_TAG_variable
>>   DW_AT_location( reg17 )   // xmm0 = 17
>>   DW_AT_name( "f" )
>>   DW_AT_decl_file( "test.c" )
>>   DW_AT_decl_line( 8 )
>>   DW_AT_type( {0x0000004a} ( float ) )
>> 
>> Which causes LLDB to complain that the size of register xmm0 (128 Bits) is
>> different from the size of f (32 Bits). I wonder who is wrong? Is LLDB
>> being too strict, or should clang actually emit something like DW_OP_reg
>> 17 (xmm0) DW_OP_piece 4 to make it abundantly clear that only the lower 32
>> bits of the vector register are interesting?
>> 
>> -- adrian
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