[Dwarf-Discuss] modeling different address spaces

[Metzger, Markus T]

Hello Michael,

> > I have a write-up ready but wanted to wait until we have a public
> implementation.
> > Is that the right order?  Or would you rather want to review proposals right
> away.
> 
> I'm not sure what a SIMD lane is.  There are a number of architectures
> which support SIMD, such as the AVX extension in x86.  We try to
> describe functionality in generic terms as much as possible so that it
> can be used with a variety of architectures.
> 
> We'd be happy to see your proposal.  Often an implementation is a good
> proof of concept, but getting feedback on a design early in the process
> can be a guide to that implementation and avoids changes later.

I tried submitting the proposal via the public comment function but I'm not sure
whether I succeeded.  When I clicked on "Submit Comment" nothing happened.
I have not filled out the Section and Page fields as the proposal covers multiple
sections on multiple pages.  I did not get any error.  I'm attaching the proposal.

The proposal covers SIMD in general.  I have patches for GDB with a test case
using AVX.


> > We'd also want an unbounded piece operator to describe partially registerized
> > unbounded arrays, but I have not worked that out in detail, yet, and we're a bit
> > farther away from an implementation.
> 
> Can you describe this more?

Consider a large array kept in memory and a for loop iterating over the array.  If that
loop gets vectorized, compilers would load a portion of the array into registers at the
beginning of the loop body, operate on the registers, and write them back at the end
of the loop body.

The entire array can be split into three pieces:
- elements that have already been processed: in memory
- elements that are currently being processed: in registers
- elements that will be processed in future iterations: in memory

For unbounded arrays, the size of the third piece is not known.

Regards,
Markus.

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