[Dwarf-discuss] DWARF register numbers on MIPS

John DelSignore JDelSignore@perforce.com
Wed Aug 16 15:37:01 GMT 2023

If you can’t find it in an ABI document… You might want to look at the GDB sources, which usually contains the code to handle various targets, probably in a file named “gdb/mips*tdep.h”.

Cheers, John D.

From: Dwarf-discuss <dwarf-discuss-bounces+jdelsignore=perforce.com@lists.dwarfstd.org> On Behalf Of Seva Alekseyev via Dwarf-discuss
Sent: Wednesday, August 16, 2023 11:23 AM
To: dwarf-discuss@lists.dwarfstd.org
Subject: [Dwarf-discuss] DWARF register numbers on MIPS

What is the canonical mapping between DWARF register numbers and MIPS32 CPU registers, please? The first 32 ones are the general purpose registers, but what about beyond that (e. g. lo/hi)?

A link to an authoritative document would be most welcome. DWARF proper doesn't document this kind of thing, it's usually a part of the ABI, but the ABI handbook doesn't seem to mention DWARF.

CAUTION: This email originated from outside of the organization. Do not click on links or open attachments unless you recognize the sender and know the content is safe.

This e-mail may contain information that is privileged or confidential. If you are not the intended recipient, please delete the e-mail and any attachments and notify us immediately.

-------------- next part --------------
An HTML attachment was scrubbed...
URL: <https://lists.dwarfstd.org/pipermail/dwarf-discuss/attachments/20230816/b23b9349/attachment.htm>

More information about the Dwarf-discuss mailing list